DDR SDRAM
DDR SDRAM or double-data-rate synchronous dynamic random access memory is a type of memory used in computers and consumer electronics. It achieves greater bandwidth than the preceding single-data-rate SDRAM by transferring data on both the rising and falling edges of the clock signal.
64Mb DDR
| Part No. |
Organization |
Speed Grade |
Voltage |
Package |
Status* |
RoHS |
|
|
4Mx16 |
4 Banks |
-4 |
250 MHz |
CL3/CL4 |
2.6V±0.1V |
TSOP II 66-pin (400 mil) using Pb free with RoHS compliant |
P |
Y |
| -5 |
200 MHz |
CL3 |
2.5V±0.2V |
| -6 |
166 MHz |
CL2.5 |
|
|
4Mx16 |
4 Banks |
-5 |
200 MHz |
CL3 |
2.5V±0.2V |
Packaged in 60 Ball TFBGA, using Lead free materials with RoHS compliant |
P |
Y | * Status: P= Mass Production, S=Samples, UD=Under Development, UD (Time)= Under Development(Ready Time), EOL=End of life.
128Mb DDR
| Part No. |
Organization |
Speed Grade |
Voltage |
Package |
Status* |
RoHS |
|
|
8Mx16 |
4 Banks |
-5 |
200 MHz |
CL3 |
2.5V ±0.2V |
Packaged in 60 Ball TFBGA, using Lead free materials with RoHS compliant |
P |
Y |
| W9412G6IH |
8Mx16 |
4 Banks |
-4 |
250 MHz |
CL3/CL4 |
2.6V ±0.1V |
TSOP II 66-pin (400 mil) using Pb free with RoHS compliant |
P |
Y |
| -5 |
200 MHz |
CL3 |
2.5V±0.2V |
| -6 |
166 MHz |
CL2.5 |
| W9412G2IB |
4Mx32 |
4 Banks |
-4 |
250 MHz |
CL3/CL4 |
2.6V ±0.1V |
Packaged in 144L LFBGA, using Lead free with RoHS compliant |
P |
Y |
| -5 |
200 MHz |
CL3 |
2.5V±0.2V |
| -6 |
166 MHz |
CL2.5 |
* Status: P= Mass Production, S=Samples, UD=Under Development, UD (Time)= Under Development(Ready Time), EOL=End of life.
256Mb DDR
| Part No. |
Organization |
Speed Grade |
Voltage |
Package |
Status* |
RoHS |
|
W9425G6EH |
16Mx16 |
4 Banks |
-4 |
250 MHz |
CL3 |
2.6V ±0.1V |
Packaged in TSOP II 66-pin, using Lead free materials with RoHS compliant |
P |
Y |
| -5/-5I |
200 MHz |
2.5V ±0.2V |
| -6/-6I |
166 MHz |
CL2.5 |
|
|
16Mx16 |
4 Banks |
-5 |
200 MHz |
CL3 |
2.5V ±0.2V |
Packaged in 60 Ball TFBGA, using Lead free materials with RoHS compliant |
P |
Y |
|
|
32Mx8 |
4 Banks |
-5 |
200 MHz |
CL3 |
2.5V±0.2V |
TSOP II 66-pin, 400 mil using Pb free with RoHS compliant |
P |
Y |
* Status: P= Mass Production, S=Samples, UD=Under Development, UD (Time)= Under Development(Ready Time), EOL=End of life.
Contact us:
SDRAM@winbond.com
|