DDR SDRAM
| Part No. |
W9412G6IH |
| Datasheet |
W9412G6IH.pdf |
| Description |
The W9412G6IH is a 128M DDR SDRAM and speed involving -4/-5/-6 Status: Mass Production |
| Features |
- 2.5V ±0.2V Power Supply for DDR333/400
- 2.6V ±0.1V Power Supply for DDR500
- Up to 250 MHz Clock Frequency
- Double Data Rate architecture; two data transfers per clock cycle
- Differential clock inputs (CLK and /CLK)
- DQS is edge-aligned with data for Read; center-aligned with data for Write
- CAS Latency: 2, 2.5, 3 and 4
- Burst Length: 2, 4 and 8
- Auto Refresh and Self Refresh
- Precharged Power Down and Active Power Down
- Write Data Mask
- Write Latency = 1
- 15.6μS refresh interval (4K/64 mS refresh)
- Maximum burst refresh cycle: 8
- Interface: SSTL_2
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| Diagram |
N/A |
| Package |
TSOP II 66-pin, 400 mil using Pb free with RoHS compliant |
| Other Files |
N/A |
| Development Tools |
N/A |
| Others |
N/A |
Contact us: SDRAM@winbond.com
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