EnglishThe W71P SpiStack® integrates multiple independently addressable dies into a single package using the C2h command. Through heterogeneous NOR+pSRAN stacking, it combines the storage reliability of NOR with the high-speed performance of pSRAM. This architecture supports concurrent operations, allowing code execution to continue even during erase cycles, and enables simultaneous programming of all dies to boost manufacturing throughput.
Characteristics
- Voltage: 1.8V
- Density: QSPI NOR 128Mb + pSRAM 64Mb
- Interface: I/O NOR x1x2x4, pSRAM x1x4
- Speed: NOR STR 166MHz, pSRAM STR/DTR 144MHz
- Features:
- Built-in 1-Bit ECC
- Low power-down current
- eXecute-in-place (XiP)
- Power Supply Lock-Down and OTP protection
- Discoverable Parameters (SFDP) Register
- Small Form Factory Package of 4x4 WSON and 5x6 WSON8
Target Applications
- Image Recognition Systems
- Drone
- Smart Fleet Management Systems
- Smart Home & AIoT
