W9425G6JB
The W9425G6JB is a 256M DDR SDRAM and speed involving -4/-5/-5I
產品特點
Up to 200 MHz Clock FrequencyDouble Data Rate architecture; two data transfers per clock cycle
Differential clock inputs (CLK and /CLK)
DQS is edge-aligned with data for Read; center-aligned with data for Write
CAS Latency: 2, 2.5 and 3
Burst Length: 2, 4 and 8
Auto Refresh and Self Refresh
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = 1
7.8μS refresh interval (8K/64 mS Refresh)
Maximum burst refresh cycle: 8
Interface: SSTL_2
Package
TFBGA 60
Specifications
Part No. | W9425G6JB | Voltage | 2.5V±0.2V |
---|---|---|---|
Speed | 200MHz 250MHz |
Temp. | C-temp, I-temp/ Automotive |
Organization | 16Mbitx16 | Automotive | P |
Status | N |