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The W9425G6JB is a 256M DDR SDRAM and speed involving -4/-5/-5I

Density 256Mb Industrial & Commercial Status Mass Production
Vcc 2.5V±0.2V Frequency 200MHz / 250MHz
Package FBGA 60 Temperature Range C-temp, I-temp, Automotive
Feature List Up to 200 MHz Clock Frequency, Double Data Rate architecture; two data transfers per clock cycle, Differential clock inputs (CLK and CLK), DQS is edge-aligned with data for Read; center-aligned with data for Write, CAS Latency: 2, 2.5 and 3, Burst Length: 2, 4 and 8, Auto Refresh and Self Refresh, Precharged Power Down and Active Power Down, Write Data Mask, Write Latency = 1, 7.8μS refresh interval (8K64 mS Refresh), Maximum burst refresh cycle: 8, Interface: SSTL_2
Datasheet オンライン購入

Technical Documentation

Resources

Product Brief

Specialty DRAM and Mobile DRAM

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  • File Type:pdf
  • Updated:27/05/2020
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